Laboratory for Internet and Innovative Technologies

In this paper we analyze the performance of sequential and parallel implementation of matrix vector multiplication algorithm on a multi-chip multi-core multiprocessor. We analyze three different multiprocessors: single-chip multi-core, multi-chip single-core and multi-chip multi-core multiprocessor. The results show that the speed and speedup depends on cache organization of multiprocessors despite the same number of cores. Although Gustafson’s Law limits the speedup for parallel implementation on the number of used processors (CPU cores), we achieved a region for problem size where superlinear speedup (speedup greater than the number of processors) is achieved for each multiprocessor.


Sasko Ristov, Goran Velkoski, and Marjan Gusev


Gustafson’s law, shared memory multiprocessor, high performance computing

Full Paper

The technical report is published as a paper in Proceedings of 3rd Int. Conf. on Information Society Technology, YUINFO ICIST 2013,, Kopaonik, 3-6.3.2013